last Friday,RVNThe official team meeting was held as scheduled. At the meeting, the team members discussed the "new anti-ASIC algorithm". The article included the opinions of their community members and analyzed and compared the benefits before and after the algorithm. This article was translated and edited by Mine Vision (Miracle Moore). If you need to reprint, please indicate the source.

(1) A small discussion on "New Anti-ASIC Algorithm"

RVN core developer Tron claimed that he had read the X1MT-related article. The article was written by whitefire990 on suggestions for anti-ASIC algorithms, and Tron also said that the article was thoroughly researched and analyzed the reasons why ASIC is difficult to solve.

But at the same time, Tron is also concerned about the properties of the seed algorithm that are more advantageous in fooling ASICs, because this will increase the time required for block mining. PlayHard also points out that while the documentation is excellent, there is no mention of the required power consumption and calculations.

Author Whitefire990 explained that the paper is pushing for an X1MT variant that has a constant hashrate per block and requires only one or two nibbles in the block header. He also said that if someone doesn't like any of the variations suggested, they might as well post an article themselves.

Below we have collected some of the RVN community's views on the paper and the comparison of data used to support the views.

(2) Personal opinion

01 Home of the long-term anti-ASIC algorithm

I participated in the recently created Algorithms channel and kept observing discussions about ASIC resistant methods. Even though I have been analyzing blockchain and cryptocurrencies unprofessionally in my own way for five years, I have been able to understand the design and direction of each professional proposal approach. One of the methods is the X1MT method mentioned in this meeting.

The purpose of Whitefire990's article is to understandX16limitations of R-style algorithms, and expresses the hope that the paper will inspire new ideas, or perhaps repackage other ideas in different ways.

At this point, I'm going to skip Whitefire990's article, I don't think many people will get it, so I'm going to summarize it in my own way, maybe a little longer. But know that it takes a lot of energy and time to learn and analyze new things every time, and I am willing to serve as a bridge to the community.

02 Saving Private GPUs in the Anti-ASIC Battlefield

The purpose of that article by Whitefire990 is to keep the same style and spirit as the X16R algorithm, while converting without developing an entirely new algorithm. In addition, the efficiency of the new algorithm scheme is compared with 28nm ASIC and 1080i GPU of X11 algorithm.

03 The profit ratio before and after applying the X16S algorithm to each hardware in the ASIC environment

First, there are 16 selectable algorithms in X16S. The S is followed by the base 16 algorithm listing order itself, but new algorithm listing orders are randomized at each block creation. In short, the order of the algorithm list itself is set in the basic design, but the order of the algorithm list from N blocks to N+15 blocks is random. The simulation results are as follows. Before applying the X16S algorithm, the price/performance ratio of the ASIC is about 175 times that after applying the algorithm.

04 The revenue ratio before and after applying the X16R algorithm to each hardware in the ASIC environment

This time, it is a simulation of the ASIC resistance of X16R, which is responsible for the ASIC resistance of RVN before October 1, 2019. Unlike the X16S described earlier, the algorithm list order changes for each block creation and basic design.

At first glance it might appear that the ASIC resistance is significantly higher because the S method is more random than the R method, but this is not the case. The reason is the order in which the blocks are selected. That is, after monitoring the random sequence of the generating algorithm 100 million times each time a block is created, one of the 16 algorithms is continuously repeated. It is particularly worth mentioning that the probability of repeating an algorithm 5 times in a row is only 4.3%, and the probability of repeating it more than 6 times in a row approaches zero.

Therefore, the efficiency gains of designing a chip with a "select and focus" strategy from the side of the ASIC manufacturer to exclude a particular algorithm that can be repeated more than four times in a row cannot be ignored. Because of this, the price/performance ratio of the ASIC before applying the X16R algorithm is about 81 times that after applying it.

05 The profit ratio before and after applying the X16RF algorithm to each hardware in the ASIC environment

X16RF is designed to address the low duplication probability of specific algorithms shown in X16R by increasing the continuity of specific algorithms by extracting an additional four digits from the block header. The results show that the probability of an algorithm appearing 12 times in a row increases to about 8.6%. For this reason, the ASIC price performance before applying the X16RF algorithm is about 27 times higher than after applying the X16RF algorithm.

06 Profit ratio before and after applying the X1632RF algorithm to each hardware in the ASIC environment

X1632RF algorithm is similar to X16RF, but there is a difference in the number of algorithms that can be selected during block creation (one can select more than 16 algorithms). In fact, the complexity of ASIC design becomes higher and higher, so the ASIC price-performance ratio before applying X1632RF algorithm is about 13.4 times that after applying it.

07 The profit ratio before and after applying the X20RVS algorithm to each hardware in the ASIC environment

X20RVS has 20 optional algorithms, and the algorithm order will change every time a block is created. VS stands for Variable Sbox, and the purpose is to add complexity, which has always been very unpleasant for GPUs. This is because the profitability of ASIC is 65.1 times that of X20RVS GPU, which is not much different from that of X16R, but the price/performance ratio of ASIC and FPGA is greatly reduced by about two times.

08 The profit ratio before and after applying the X1MT algorithm to each hardware in the ASIC environment

The last review is about the X1MT algorithm, including memory translation (MT) as we know from the name. The expected effect of this algorithm is as follows.

① It maintains almost similar price/performance ratio for GPU and FPGA

②It has the maximum amount of ASIC resistance recommended by any variant

③ It can be calibrated to balance and stabilize the computing power of the entire network between blocks, making it easier for the difficulty adjustment algorithm to maintain 60-second blocks

It is worth noting that the memory conversion does not affect the GPU or FPGA computing power at all, but makes the ASIC greatly reduce its performance. The simulation results show that before the application of the X1MT-16 algorithm, the performance-to-performance ratio of the ASIC is about 7.7 times that after the application, but it is only 2 to 5 times higher when it comes to the FPGA.

FYI, the ASIC price/performance before applying the X1MT-32 algorithm is about 3.5 times that after applying it. Compared with FPGA, the price/performance ratio is not much different.

Whitefire990 said at the end of the article that the X1MT-16 uses the same hash function as the X16R, and the GPU programmer only needs to implement the scratchpad generation and memory translation steps, which can take 3 days.

The same step is required for X1MT-32, plus the implementation of M6 and HAMSI-256, without existing GPU code for this step.

Additionally, the X1MT-32 requires some "cut and paste" from other GPU mining software such as Nexus and Sinovate to assemble the rest of the functionality. It might also take a good GPU programmer a full week to get X1MT-32 up and running.

What he said, in simple terms, is that there is almost no perfect anti-ASIC method. In my opinion, it is another generation of ASICs that can beat ASICs. However, the RVN development team designed the new algorithm X16R to make RVN easier to mine from the beginning, and is still working hard to maintain the distribution of RVN mining. Proposals that we have reviewed are also one of the outcomes. We hope that a sustainable ASIC-resistant approach to RVN will one day emerge, and our community will continue to support this vision.

Translation & Proofreading: There is a fish.

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